UIC and the CHIPS and Science Act

Microelectronics and Semiconductors

UIC’s College of Engineering is dedicated to researching and building better microelectronics, such as transistors, LEDs, and integrated circuits. About two dozen ECE courses are designed to help tomorrow’s engineers meet the growing demand in this critical area.

UIC is Chicago’s largest university and its only public R1 research institution. There are over a dozen faculty working directly on improving semiconductor manufacturing, with over $200 million in active funding, including partnerships with industry and government. UIC boasts a Class 100 – 1000 cleanroom accessible to both academic non-profit and industrial researchers. And UIC is committed to broad workforce development, aligning the curriculum to the goals of the CHIPS and Science Act.

UIC and the CHIPS and Science Act Heading link

With over $200 million in active funding related to semiconductors, a 3,000-foot nanofabrication cleanroom, and undergraduate and gradute courses related to semiconductor manufacturing, UIC is aligned with the goals of the CHIPS and Science Act, and ready to contribute with its broad expertise.

The Creating Helpful Incentives to Produce Semiconductors, or CHIPS and Science Act of 2022, aims to revitalize the domestic semiconductor industry in the U.S. The scale of new funding is staggering: the Act provides roughly $280 billion in funding to bolster domestic chip production, strengthen U.S. leadership in research and development, and provide for workforce training. Today, the U.S. manufactures just 12 percent of the world’s chips, down from 37 percent in 1990. Bringing semiconductor research back to the U.S. will strengthen domestic security and alleviate supply chain issues.

Photo of department head Daniela Tuninetti

It is an exciting time for ECE departments, as bipartisan support drives the U.S. forward to reclaim its position as a global leader in microelectronics and semiconductor manufacturing. This is not only a remarkable opportunity for our faculty at UIC, who continue to lead with cutting-edge research in this space, but also for our students. Thousands of high-paying jobs will be created in the coming years to support the national semiconductor industry, offering bright futures for our ECE graduates and helping to secure America’s technological independence.

Daniela Tuninetti, PhD | ECE Department head and professor

UIC Nanotechnology Core Facility Heading link

The Nanotechnology Core Facility (NCF), located in the Engineering Research Facility building on UIC’s campus, is a versatile MEMS/Nano facility accessible to both academic non-profit and industrial researchers. The 3,000-square-foot facility was recently renovated to an ISO class 5 and 6 (Class 100 & 1000) nanofabrication cleanroom. The facilities daily operation is maintained by the NCF Executive Director Seyoung Ann, the Research Faculty Director Igor Paprotny, and several graduate research associates.

The NCF enables research by providing access, training, service, and process guidance on fabrication and characterization equipment. As a research and development laboratory, NCF is dedicated to application of integrated circuit and fiber optic technology to improve manufacturing methods for MEMS/Nano devices, BioMEMS, Microfluidic, Electromechanical, Mechanical, Chemical, Optical, Photonic and multi-functional devices, some of which have previously been built by more traditional techniques.

Equipment available in the NCF provide capabilities in photolithography, thin film deposition (metals, semiconductors, and dielectrics) etching, sample characterization (electrical, optical, and surface), dicing, and lead attachment.

The NCF provides R&D expertise and service support to the research efforts of both University faculty and external commercial companies.

Photo of Igor Paprotny Associate Professor

We have the facilities, and we have the people, to fully contribute to CHIPS and Science Act

Igor Paprotny | NCF research director and associate professor

The People Heading link

Highlighted UIC faculty members with micro-electronics and semi-conductor expertise and research include:

Amit Trivedi

Amit Trivedi’s research interests include artificial intelligence at the edge, hardware security, and nanorobotics, and machine learning. He has 12 parallel grants, with more than three million dollars in current research funding. He joined UIC as a tenured track assistant professor in October 2015. Trivedi completed his undergraduate and a graduate degree from the Indian Institute of Technology (IIT), Kanpur in 2008. Following this, he was a research staff member at IBM Semiconductor Research and Development Center, where he was involved in compact modeling and Trivedi earned his PhD at the Georgia Institute of Technology, where his research focused on low power energy-efficient neuromorphic computing with emerging technologies, and particularly, with tunneling field-effect-transistors. He awarded Sigma Xi Best PhD thesis award at Georgia Tech. Trivedi was a research intern at IBM T J Watson research center in the summer of 2012, and Intel’s Circuit research lab in the summer of 2014. He joined UIC as a tenured track assistant professor in October 2015. He was awarded the IEEE Electron Device Society fellowship in 2014, where he was one of the three recipients worldwide, and only one in the Americas. At UIC, Trivedi has been awarded the College of Engineering Seed Funding award and Phase-I Chancellor’s Proof-of-Concept award. In 2021, he received an NSF CAREER award for his project on robust and ultra-low-power spatial intelligence.

Arman Roohi

Arman Roohi joined the electrical and computer engineering department as an associate professor in 2024. His research is focused on pioneering innovative cross-layer hardware and software co-design approaches, spanning device, circuit, and architecture levels, to tackle the challenges of implementing complex, data- and memory-intensive applications. I am particularly passionate about creating secure, sustainable, and highly efficient computing systems that push the boundaries of what’s possible in modern technology. He currently has four NSF-funded projects. Prior to joining UIC, Roohi was an assistant professor at the University of Nebraska’s Lincoln School of Computing and the director of the Intelligent Device-2-Applications Lab. He completed his postdoctoral studies at the University of Texas at Austin and completed his PhD at the University of Central Florida. Roohi is working on several projects in computer architecture, especially non-von Neumann and battery-less architecture.

Debjit Pal

Debjit Pal is an expert on application of AI/ML techniques on various computer-aided design problems (CAD) related to hardware design and verification. His research focuses on new algorithms, methodologies, and design automation tools for building correct and reliable heterogeneous computing. Specifically, his recent publications focus on post- and pre-silicon validation of System-on- Chips (SoCs), High-Level Synthesis (HLS), and security validation. PI Pal is the lead developer of the automatic assertion generation tool GoldMine, which many hardware companies have licensed and has been used widely in academia and co-developer of HeteroCL, A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing. Pal’s research received three Best Paper Nominations in ICCAD 2015, DAC 2018, ASP-DAC 2019, one Best Paper Award in FPGA 2024, and an IEEE CEDA Student Research Award 2016.

Faculty profile

Aritra Banerjee

Aritra Banerjee’s research focuses on making electronic chips containing analog, RF, millimeter-wave, and sub-THz integrated circuits. These circuits are crucial for different applications such as next generation wireless communication, radar, quantum systems, and computing. For designing such circuits, Banerjee uses various semiconductor technologies, including complementary metal-oxide-semiconductor (CMOS), silicon-germanium (SiGe), gallium nitride (GaN), and indium phosphide (InP). Banerjee’s research involves designing the chips with the help of software simulation, getting the chips manufactured through foundries, and then testing and characterizing the chips in the laboratory.

Pai-Yen Chen

Prior to joining UIC, Pai-Yen Chen spent three years at Taiwan Semiconductor Research Institute (TSRI). He has been working on radio-frequency semiconductor materials and devices, VLSI process, physics-based modeling of semiconductor devices, and tunneling field-effect transistors (TFETs). Currently, he is researching new semiconductor devices and circuits to implement physically unclonable functions (PUFs). PUFs can be used as efficient and reliable hardware security primitives for chip identification and authentication, paving a promising route towards “post-quantum cryptography (PQC).”
His group is also studying how to exploit the integrated passive device (IPD) and heterogenous integration (HI) technologies to embed an “unseeable” antenna on a chip, so-called antenna-on-chip, for 5G and B5G communication applications. He is also collaborating with UIC’s two DPI partners in Taiwan on silicon photonics with versatile applications in lidar, high-speed interconnects, and security.

Sudip Mazumder

Laboratory for Energy and Switching-Electronic Systems (LESES)
at UIC leads the power electronics effort. Having conducted more than 60 sponsored projects with support from leading federal agencies, national labs, and industry, LESES is a recognized leader in the USA and the world. As a part of the CHIPS act effort, LESES aims to design, develop, fabricate, and validate next generation power-delivery, power-management, power-conversion, power-semiconductor, and associated heterogeneous chip and packaging technologies facilitating technology to market (T2M) transition encompassing but not limited to: application sectors, including national defense and emerging commercial markets, electromagnetic warfare, secure-edge computing, artificial intelligence (AI) hardware, quantum technology, 5G/6G technology, renewable energy and electric mobility, and commercial leap-ahead technologies

Constantine Megaridis

Constantine Megridis

Constantine Megridis works in the area of thermal management of electronics. His research tools rely on principles of fluid physics, heat transfer and materials science. The escalating power consumption of electronic components has triggered a critical need for efficient thermal management, especially of thermal hotspots that may develop when electronics get pushed to their performance limits. The continuous trend to fit more and more electronic components in ever diminishing volumes requires novel approaches that can remove heat fluxes rivaling those on the sun’s surface (several kW per square centimeter). The work in Megridis’ lab, the Micro/Nanoscale Fluid Transport Laboratory, specializes in wettability engineering, an approach that modifies the surfaces of materials in ways that promote more efficient heat removal from active electrical components.

Yauye Pan

Heterogeneous Integration (HI) will be crucial to cost- and power-efficient implementations of next-generation computing and communication systems. Among the HI efforts, interconnect pitch scaling, as well as next-generation interconnects, are critical approaches to achieving high-bandwidth density and energy efficiency. Current material and process set may not support features below 5 um line and space, which is a bottleneck to enabling the next-generation interconnects for HI. To enable interconnect innovations, Pan’s group is working on development of novel materials and advanced manufacturing techniques. Pan aims to develop the novel conducting polymer composite for a micro-additive manufacturing (µAM) process, to enable high-throughput customizable productions of three-dimensional interconnects. The novel composite material and µAM technique will achieve higher package-routing density/miniaturization, improved electrical performance, and mechanical and thermal performance enhancement for improved processability and reliability.

Inna Partin-Vaisband

High-performance computing plays a key role in supporting modern and emerging high-power applications. With advanced packaging solutions, systems that consume tens of kilowatts of power become viable. Considering the high power and density requirements in these systems, the path forward with traditional power delivery approaches is, however, unsustainable with respect to energy efficiency and thermal challenges. With over 15 years of experience in power delivery and management in electronic systems, Partin-Vaisband is working on developing vertical power delivery solutions for next generation high-performance computing (HPC) systems. A special focus is placed on development of digital twins for HPC power systems and design of compact embedded power-efficient converters and passives. Partin-Vaisband is a power delivery expert in the $327 million JUMP 2.0 Center for Heterogeneous Integration of Micro Electronic Systems (CHIMES). Her previous achievements in the field include a book, On-Chip Power Delivery and Management (4th ed), and technology transfer to Qualcomm: a distributed power delivery system designed, fabricated, and tested by Partin-Vaisband was in mass production within the Galaxy android smart phones, as part of the Qualcomm Snapdragon product line.

Lucy Shi

The Advanced Semiconductor Materials and Devices Laboratory at UIC led by J. Lucy Shi specializes in a new generation of semiconductors beyond traditional silicon, such as group III-V nitrides, b-Ga2O3, etc. These semiconductors are essential for the economy, thanks to their fundamental properties such as wide and ultra-wide bandgaps, high and very high critical breakdown electric field, and large Baliga’s figure of merit, which promise ultra-high efficiency, in addition to high power, low losses, and high breakdown voltage. While silicon-based transistors are quickly approaching their theoretical limits of operating frequency, breakdown voltage and power density, these aforementioned wide and ultrawide bandgap semiconductors are destined to power future applications with high performance in the areas of electric grid, EV charging, HEV/EV, solar, motor drives, networking/servers, space electronics, etc., with a much more compact size. In addition, we also work on other semiconductor materials (TMDCs etc.) for quantum computing applications, for example, spin qubits, spin-valley qubits, and valley qubits.

Igor Paprotny

Paprotny leads the Micromechatronic Systems Laboratory (MSL), with heavy focus on micro and nanofabrition of microelectromechanical systems (MEMS), as well as heterogenous device integration. His current research focus, among other, include sensors based on functionalized 2D nanomaterials, as well as 3D-printed photonics for sensing and computation. Paprotny is the Research faculty Director of the UIC Nanotechnology Core Facility. As part of the NCF activities, Paprotny is significantly involved in the development and training of divers and equitable workforce to support domestic Semiconductor Manufacturing.

Workforce development for CHIPS Heading link

UIC is part of the Illinois Semiconductor Workforce Network (ISWN) which was selected for an award from Workforce Partner Alliance (WFPA) program from National Semiconductor Technology Center (NSTC) enabled by the CHIPS and Science Act. UIC PIs involved in this award are Dr. Igor Paprotny, Dr. Aritra Banerjee, Dr. Debjit Pal, Dr. Junxia Lucy Shi, and Dr. Carmen Lilley.

The ECE department is aligning its curriculum to meet the needs of this growing industry and provide students with the tools for success in a career in semiconductors.

The CHIPS Act also aims to broaden participation in semiconductor manufacturing. The Act authorizes funding to build the capacity of minority-serving institutions, historically Black colleges and universities, and tribal colleges to successfully compete for and administer NSF grants and contains monies to study and implement approaches to attracting and retaining students from diverse backgrounds and institutions in STEM research fields.