Photo of Trivedi, Amit Ranjan

Amit Ranjan Trivedi

Assistant Professor

Department of Electrical and Computer Engineering

Contact

Building & Room:

3015 ERF

Address:

842 West Taylor Street, MC 154, Chicago, IL 60607

Office Phone:

(312) 996-5256

Related Sites:

About

Amit completed his undergraduate and a graduate degree from the Indian Institute of Technology (IIT), Kanpur in 2008. Amit was awarded an academic excellence award from the institute for his standing in the top 5% of his peers. Following this, he was a research staff member at IBM Semiconductor Research and Development Center, where he was involved in compact modeling and characterization of advanced nanometer node transistors/processes. Since, Fall 2010, Amit pursued Ph.D. at the Department of Electrical and Computer Engineering at Georgia Institute of Technology (Georgia Tech). His research was in low power energy-efficient neuromorphic computing with emerging technologies, and particularly, with Tunneling field-effect-transistors. Amit was a research intern at IBM T J Watson research center in the summer of 2012, and Intel’s Circuit research lab in the summer of 2014. Amit joined UIC as a tenured track assistant professor in October 2015. Amit was awarded the IEEE Electron Device Society fellowship in 2014, where he was one of the three recipients worldwide, and only one in the Americas. Amit was also awarded Sigma Xi Best Ph.D. thesis award at Georgia Tech. At UIC, Amit has been awarded the College of Engineering Seed Funding award and Phase-I Chancellor’s Proof-of-Concept award. In 2021, Amit has also been awarded the NSF CAREER award for his project on Robust and Ultra-low-power Spatial Intelligence.

Research Interest: Artificial Intelligence (AI) at the edge; Hardware Security; Nano-robotics

Selected Publications

  1. Fengchao Zhang, Shubhra Deb Paul, Patanjali Slpsk, Amit Ranjan Trivedi, and Swarup Bhunia. “On Database-Free Authentication of Microelectronic Components.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2020.
  2. Bogil Kim, Sungjae Lee, Amit Ranjan Trivedi, and William J. Song. “Energy-Efficient Acceleration of Deep Neural Networks on Realtime-Constrained Embedded Edge Devices.” IEEE Access, 2020.
  3. Shamma Nasrin Justine Drobitch, Priyesh Shukla, Theja Tulabandhula, Supriyo Bandyopadhyay, and Amit Ranjan Trivedi, “Bayesian reasoning machine on a magneto-tunneling junction network,” Nanotechnology, 2020.
  4. Madhu Padmanabha Sumangala, Ahish Shylendra, David J. Frank, Takashi Ando, and Amit Ranjan Trivedi. “A Simulation Study on Minimizing Threshold Voltage Variability by Optimizing Oxygen Vacancy Concentration Under Metal Gate Granularity.” IEEE Electron Device Letters, 2020.
  5. Ahish Shylendra, Priyesh Shukla, Saibal Mukhopadhyay, Swarup Bhunia, and Amit Ranjan Trivedi. “Low Power Unsupervised Anomaly Detection by Nonparametric Modeling of Sensor Statistics.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2020.
  6. Megan E. Beck, Ahish Shylendra, Vinod K. Sangwan, Silu Guo, William A. Gaviria Rojas, Hocheon Yoo, Hadallia Bergeron, Katherine Su, Amit R. Trivedi, and Mark C. Hersam. “Spiking neurons from tunable Gaussian heterojunction transistors.” Nature communications, 2020.
  7. Nick Iliev and Amit Ranjan Trivedi. “Low-Power Sensor Localization in Three-Dimensional Using a Recurrent Neural Network.” IEEE Sensors Letters, 2019.
  8. Nick Iliev, Alberto Gianelli, and Amit Ranjan Trivedi. “Low Power Speaker Identification by Integrated Clustering and Gaussian Mixture Model Scoring.” IEEE Embedded Systems Letters, 2019.
  9. Ahish Shylendra, Swarup Bhunia, and Amit Ranjan Trivedi. “An Intrinsic and Database-Free Authentication by Exploiting Process Variation in Back-End Capacitors.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019.
  10. Shamma Nasrin, Justine L. Drobitch, Supriyo Bandyopadhyay, and Amit Ranjan Trivedi. “Low power restricted Boltzmann machine using mixed-mode magneto-tunneling junctions.” IEEE Electron Device Letters, 2019.
  11. Tapas Dutta, Girish Pahwa, Amit Ranjan Trivedi, Saurabh Sinha, Amit Agarwal, and Yogesh Singh Chauhan. “Performance evaluation of 7-nm node negative capacitance FinFET-based SRAM.” IEEE Electron Device Letters, 2017.
  12. Susmita Dey Manasi, Md Mamun Al-Rashid, Jayasimha Atulasimha, Supriyo Bandyopadhyay, and Amit Ranjan Trivedi, “Skewed Straintronic Magnetotunneling-Junction-Based Ternary Content-Addressable Memory-Part II,” IEEE Transactions on Electron Devices, 2017.
  13. Susmita Dey Manasi, Md Mamun Al-Rashid, Jayasimha Atulasimha, Supriyo Bandyopadhyay, and Amit Ranjan Trivedi, “Skewed Straintronic Magnetotunneling-Junction-Based Ternary Content-Addressable Memory-Part I,” IEEE Transactions on Electron Devices, 2017.
  14. Tapas Dutta, Girish Pahwa, Amit Ranjan Trivedi, Saurabh Sinha, Amit Agarwal, and Yogesh Singh Chauhan, “Performance Evaluation of 7 nm Node Negative Capacitance FinFET based SRAM,” IEEE Electron Device Letters, 2017.
  15. Tonmoy Dhar and Amit Ranjan Trivedi, “Area and energy-efficient physically unclonable function based on k-winners-take-all,” Electronics Letters, 2016.

Notable Honors

2021, CAREER Award, NSF

2015, Sigma-Xi Best PhD Dissertation, Georgia Tech

2014, IEEE Electron Device Society (EDS) Fellowship, IEEE Electron Device Society

2005, Academic Excellence Award, Indian Institute of Technology

Education

PhD, Georgia Institute of Technology (Georgia Tech), Atlanta 2010-2015

B.Tech. + M.Tech., Indian Institute of Technology, Kanpur (IITK) 2003-2008