Your browser is unsupported

We recommend using the latest version of IE11, Edge, Chrome, Firefox or Safari.

Partin-Vaisband receives NSF CAREER grant

Inna Partin-Vaisband

Assistant Professor Inna Partin-Vaisband received a National Science Foundation Faculty Early Career Development Program (CAREER) Award for her research into securing integrated circuits against hardware Trojans.

Typical hardware Trojans (HT) include a triggering circuit, and a rarely triggered tiny circuit, or payload, that when activated can interfere with the chip’s operation, steal information, and modify data that’s being sent. Detecting these HTs is exceedingly difficult, partly due to their size, and because they are one in potentially billions of logic gates and nets, or connections, in an integrated circuit.

HTs can be inserted all along the integrated chip design process, whether it is by a malicious algorithm or tool, intellectual property from another country, or a rogue designer.

Existing approaches to finding these HT are not entirely effective and don’t scale well with integrated circuit size. Also, attackers continue to evade detection with increasingly advanced HTs.

Partin-Vaisband focuses on the rarely triggered circuits – a unique characteristic of HTs – and uses knowledge graph embedding to identify these rarely triggered connections to detect HTs.

“The fact that HTs are rarely triggered says something about the structural configuration of the circuit,” Partin-Vaisband said. “We developed an unsupervised machine learning framework that translates how often a circuit is being triggered into a certain location in an alternative two-dimensional space. As a result, for any electronic system, the rarely triggered HTs can be identified based on their location in this 2D space, and we can learn whether the system has been infected with HTs.”

The resulting tools Partin-Vaisband develops will be integrated into an end-to-end knowledge graph embedding-based HT detector and will be demonstrated on existing benchmarks and Google-sponsored projects in the areas of RISC-V, an open standard Instruction Set Architecture that enables processor innovation through open collaboration of over 3,100 members across 70 countries, and CHIPS and Science Act consortiums.

“Making our chips more secure is a high priority in the CHIPS and Science Act and will become more and more important as chips continue expanding into security-sensitive domains such as personalized medicine, artificial intelligence, autonomous vehicles, and others,” Partin-Vaisband said.

The $600,000 grant, titled “Unified Reference-Free Early Detection of Hardware Trojans via Knowledge Graph Embeddings,” runs from August 1, 2023, through July 2028.

This is Partin-Vaisband’s fifth consecutive grant. In addition to the NSF, she has received funding from DARPA, SRC, and a research scholar award from Google. This year alone, she has received $2.7 million in external funding.